Design, FPGA implementation and statistical analysis of chaos-ring based dual entropy core true random number generator

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dc.authoridPehlivan, Ihsan/0000-0001-6107-655X
dc.authoridFIDAN, CAN BULENT/0000-0001-5252-6301
dc.contributor.authorKoyuncu, Ismail
dc.contributor.authorTuna, Murat
dc.contributor.authorPehlivan, Ihsan
dc.contributor.authorFidan, Can Bulent
dc.contributor.authorAlcin, Murat
dc.date.accessioned2024-09-29T15:51:12Z
dc.date.available2024-09-29T15:51:12Z
dc.date.issued2020
dc.departmentKarabük Üniversitesien_US
dc.description.abstractIn this paper, a novel chaos-ring based dual entropy core TRNG architecture on FPGA with high operating frequency and high throughput has been performed and presented. The design of dual entropy core TRNG has been generated by uniting the chaotic system-based RNG and the RO-based RNG structures on FPGA. The chaotic oscillator structure as the basic entropy source has been implemented in VHDL using Euler numerical algorithm in 32-bit IQ-Math fixed point number standart on FPGA. The designed chaotic oscillator has been synthesized for the FPGA chip and the statistics related to chip resource consumption and clock frequencies of the units have been presented. The RO-based RNG structure has been designed as the second entropy source. Chaos-ring based dual entropy core novel TRNG unit have been created by combining of these two FPGA-based structures in the XOR function used at the post processing unit. The throughput of the designed dual entropy core TRNG unit ranges 464 Mbps. The output bit streams obtained from FPGA-based novel TRNG have been subjected to NIST 800-22 test suites.en_US
dc.identifier.doi10.1007/s10470-019-01568-x
dc.identifier.endpage456en_US
dc.identifier.issn0925-1030
dc.identifier.issn1573-1979
dc.identifier.issue2en_US
dc.identifier.scopus2-s2.0-85076849214en_US
dc.identifier.scopusqualityQ3en_US
dc.identifier.startpage445en_US
dc.identifier.urihttps://doi.org/10.1007/s10470-019-01568-x
dc.identifier.urihttps://hdl.handle.net/20.500.14619/3925
dc.identifier.volume102en_US
dc.identifier.wosWOS:000516537400016en_US
dc.identifier.wosqualityQ4en_US
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.language.isoenen_US
dc.publisherSpringeren_US
dc.relation.ispartofAnalog Integrated Circuits and Signal Processingen_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectChaosen_US
dc.subjectChaotic systemsen_US
dc.subjectFPGAen_US
dc.subjectRing oscillatoren_US
dc.subjectTRNGen_US
dc.subjectStatistical testsen_US
dc.titleDesign, FPGA implementation and statistical analysis of chaos-ring based dual entropy core true random number generatoren_US
dc.typeArticleen_US

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